The present invention relates generally to the chemical etching of inorganic substrates, and more particularly to the chemical etching of quaternary interface layers of InGaAsP.
Heterojunction Bipolar Transistors (HBTs) are very high performance transistors which, unlike conventional bipolar transistors, are built using more than one semiconductor material (hence the term xe2x80x9cheterojunctionxe2x80x9d). These transistors are constructed to take advantage of the different bandgaps of the semiconductor materials that are used to form the emitter, base and collector portions of the device. Such semiconductor materials include n-AlGaAs/p-GaAs/n-GaAs, or SiGe in combination with Si. HBTs may be formed using high precision epitaxy, such as Molecular Beam Epitaxy (MBE) or Metal-Organic Chemical Vapor Deposition (MOCVD).
Currently, AlGaAs/GaAs HBTs are the fastest growing segment of the semiconductor industry. However, over the next several years, InGaP/GaAs technology is expected to overtake AlGaAs/GaAs, due to its superior electrical characteristics and reliability. This fact has been recognized in the art. Thus, for example, U.S. Pat. No. 6,043,520 (Yamamoto) notes that elimination of Al from the emitter layer and ballast resistor layer of these devices reduces the amount of impurities trapped during crystal growth. This, in turn, prevents the deterioration of current stability which may arise from such impurities, thus improving the reliability of the transistor.
InGaP/GaAs-based HBTs also offer high-speed, low power performance due to the inherent electron transport characteristics of their component materials, characteristics which include high electron mobility and high peak electron drift velocities. Moreover, the small surface recombination velocities in InGaP are advantageous for fabricating sub-micron emitter devices for high-speed, high-density integrated circuits without serious degradation in current gain. In addition, InP-based HBTs are very attractive for applications to optoelectronic integrated circuits due to their ability to be integrated with long-wavelength optical devices. The InGaP/GaAs heterojunction is also less prone to oxidation than are AlGaAs/GaAs systems, a consideration which facilitates regrowth and device processing of InGaP HBTs.
To fully exploit the advantages of InGaP/GaAs technology, however, it is necessary to develop suitable processing techniques for their manufacture, including wet and dry etching techniques. Selective wet etching is preferred in the manufacture of these systems, since InGaP needs to be selectively etched on top of the base layer with a minimum of imposed damage. The base contact is subsequently formed on the base surface. Any damage to the base surface caused, for example, by non-selective etching will degrade the performance and carrier lifetime of the device. The emitter epitaxial layer may be considerably complex, requiring selective wet etch of multiple layers, including interfacial layers.
Various etching systems, including both wet and dry techniques, are known to the semiconductor art, and some of these have found application in the manufacture of devices containing GaAs and/or InGaP layers. Thus, for example, solutions of H2O2 have been used to selectively etch InGaAs in the presence of either InAlAs or InP.
Methodologies are also known in which hydrogen peroxide and an acid are used in a two-step etching cycle for gallium arsenide. In these methodologies, the acid and hydrogen peroxide are applied in separate steps, and care is taken to rinse between applications of the two.
In one known method for making heterojunction bipolar semiconductor devices, an aqueous solution of phosphoric acid (H3PO4) and hydrogen peroxide (H2O2) is used to etch a GaAs emitter passivation layer overlying an emitter layer of InGaP. Apparently, the solution does not etch InGaP, so that the etching stops at the surface of the InGaP emitter layer.
Photochemical etching processes are also known which have been applied to n-type gallium arsenide substrates. In some of these processes, hydrogen peroxide solutions have been used to treat a variety of III-V compound semiconductors containing aluminum. There have been suggestions that some of these solutions can be made acidic through the addition of HCl.
Unfortunately, the commercial development of InGaP/GaAs-based HBTs has been hindered for several years by the lack of commercially feasible processes for reliably etching InGaP/GaAs interfaces. While processes and chemistries are known which can be used for etching either InGaP or GaAs alone, the quality and consistency of the etch becomes an issue when it is necessary to etch across an InGaP/GaAs interface. It has therefore been difficult prior to the present invention to reliably manufacture InGaP/GaAs-based HBTs on a commercial scale. This is especially true with devices having multiple InGaP/GaAs interfaces. However, such multiple interface devices are otherwise highly desirable because of the processing flexibility they afford.
Some attempts have been made to avoid these issues by altering the design of the HBT so that InGaP/GaAs interfaces are avoided, or so that the effects of uneven etching across these interfaces is minimized. However, these approaches tend to compromise the design of device parameters which are critical to the performance and reliability of the device, leading to a less functional product with less than ideal characteristics.
There is thus a need in the art for a method for manufacturing HBTs based on InGaP/GaAs which overcomes these deficiencies, and which allows HBTs to be manufactured with more sophisticated, near ideal designs. These and other needs are met by the present invention, as hereinafter described.
The present invention relates generally to the chemical etching of inorganic substrates. Upon careful investigation, it has now been found that the consistency of an etch across an InGaP/GaAs interface can be dramatically affected by problematic traces of InGaAsP which are present along the interface. These traces of InGaAsP can occur at varying thicknesses, and etch at a different rate than the underlying substrate. Consequently, etching times can vary widely from one device to the next, even within the same product lot, so that the adoption of standardized etching times results in some devices being under-etched and others being over-etched. Moreover, even within a single device, the unevenness of the thickness of the InGaAsP formations may result in some portions of the interface which are under-etched, and other portions which are over-etched.
Surprisingly, it has been found that these infirmities can be overcome, and the consistency of the etch can be dramatically improved, by removing the InGaAsP deposits occurring along the GaAs/InGaP interface through the use of the methodologies described herein. By so doing, the consistency of an etch across an InGaP/GaAs interface can be greatly improved, and standardized etching times can be adopted. Moreover, HBTs can be reliably manufactured in accordance with the invention on a commercial scale, and these devices can be fabricated with more sophisticated, near ideal designs which may contain multiple GaAs/InGaP interfaces.
In one aspect, the present invention relates to a method for fabricating a semiconductor device. In accordance with the method, a substrate is provided which contains a first layer comprising GaAs and a second layer comprising InGaP, wherein the first and second layers are joined across a common interface comprising InGaAsP. The InGaAsP will typically have the formula InxGa1xe2x88x92xAsyP1xe2x88x92ywherein 0 less than x, y less than 1. Similarly, the InGaP layer may have the general formula InxGa(1xe2x88x92x)P, where 0 less than x less than 1. The substrate may be a field effect transistor, such as, for example, a heterojunction bipolar transistor. The first layer is etched with a first liquid composition until at least a portion of the interface is exposed, and the exposed interface is then etched with a second composition comprising an oxidizing agent disposed in a liquid medium. The first composition may be, for example, a solution of H3PO4/HCl/H2O, citric acid/H2O2, or H3PO4/HCl, while the second composition may be, for example, an aqueous solution of HCl/H2O2. Preferably, the second solution is a dilute aqueous solution. The second solution also preferably exhibits etch stop behavior with respect to InGaP. The ability of the second liquid to etch stop on InGaP gives rise to substantial process flexibility, and allows for a more controlled manner by which the emitter can be defined. This methodology also allows HBTs to be manufactured with more sophisticated, near ideal designs which may contain multiple GaAs/InGaP interfaces.
In another aspect, the present invention relates to a method for etching a substrate, comprising the steps of providing a substrate comprising formations of InxGa1xe2x88x92xAsyP1xe2x88x92y, wherein 0 less than x, y less than 1, and etching the InGaAsP formations with a composition comprising an oxidizing agent disposed in a liquid medium. Preferably, the composition is a dilute acidic peroxide solution, such as a dilute aqueous solution of HCl/H2O2. The substrate may comprise epitaxial layers comprising GaAs and InGaP, and these epitaxial layers may have a common interface comprising InGaAsP.
In still another aspect, the present invention relates to a method for fabricating a semiconductor device. In accordance with the method, a Group III-V compound heterostructure is fabricated which includes contiguous first and second epitaxial layers having different compositions, and in which the first and second layers comprise GaAs and InGaP, respectively. The first and second layers have disposed between them an interface comprising InGaAsP. The heterostructure is subjected to a first etchant that selectively etches the first layer, and is then subjected to a second etchant that selectively etches the interface. The second etchant comprises an aqueous solution of H2O2 and has a pH of less than 7, preferably within the range of about 5 to less than 7, and more preferably within the range of about 5 to about 6.5.
These and other aspects of the present invention are described in further detail below.